Compensation devices, for example, metal oxide semiconductor field effect transistors using compensation regions, have been increasingly investigated as devices for power applications. In such devices, for example, alternating vertical p- and n-doped semiconductor regions are used which on the one hand should be highly doped to provide a low resistance when the device is conducting and on the other hand should compensate each other as precisely as possible to ensure a good blocking ability, for example, to avoid a breakthrough of the device like an avalanche breakthrough even at higher voltages when the device is non-conducting before a rated blocking voltage is reached. Compensating in this case essentially means that an overall effective n-doping should correspond as precisely as possible to an effective overall p-doping, for example, an effective overall p-doping adjacent to the n-doping.
To this end, conventionally sources for n- and p-doping each have been calibrated separately prior to depositing n- and p-doped layers. However, for some applications the precision of the compensation obtained in this way may not be sufficient to obtain a desired blocking behavior, for example, voltages of up to 600 V or more.
In the following, embodiments will be described in detail with reference to the attached drawings. These embodiments serve as examples only and are not to be construed as limiting the scope of the present application. For example, while embodiments may be described having a plurality of features, other embodiments may comprise less features and/or alternative features. Furthermore, features from different embodiments may be combined with each other unless specifically noted otherwise.